fence_arch_ops_gcc_ppc.hpp 1.7 KB

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  1. /*
  2. * Distributed under the Boost Software License, Version 1.0.
  3. * (See accompanying file LICENSE_1_0.txt or copy at
  4. * http://www.boost.org/LICENSE_1_0.txt)
  5. *
  6. * Copyright (c) 2020 Andrey Semashev
  7. */
  8. /*!
  9. * \file atomic/detail/fence_arch_ops_gcc_ppc.hpp
  10. *
  11. * This header contains implementation of the \c fence_arch_operations struct.
  12. */
  13. #ifndef BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_GCC_PPC_HPP_INCLUDED_
  14. #define BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_GCC_PPC_HPP_INCLUDED_
  15. #include <boost/memory_order.hpp>
  16. #include <boost/atomic/detail/config.hpp>
  17. #include <boost/atomic/detail/header.hpp>
  18. #ifdef BOOST_HAS_PRAGMA_ONCE
  19. #pragma once
  20. #endif
  21. namespace boost {
  22. namespace atomics {
  23. namespace detail {
  24. //! Fence operations for PowerPC
  25. struct fence_arch_operations_gcc_ppc
  26. {
  27. static BOOST_FORCEINLINE void thread_fence(memory_order order) BOOST_NOEXCEPT
  28. {
  29. if (order != memory_order_relaxed)
  30. {
  31. #if defined(__powerpc64__) || defined(__PPC64__)
  32. if (order != memory_order_seq_cst)
  33. __asm__ __volatile__ ("lwsync" ::: "memory");
  34. else
  35. __asm__ __volatile__ ("sync" ::: "memory");
  36. #else
  37. __asm__ __volatile__ ("sync" ::: "memory");
  38. #endif
  39. }
  40. }
  41. static BOOST_FORCEINLINE void signal_fence(memory_order order) BOOST_NOEXCEPT
  42. {
  43. if (order != memory_order_relaxed)
  44. {
  45. #if defined(__ibmxl__) || defined(__IBMCPP__)
  46. __fence();
  47. #else
  48. __asm__ __volatile__ ("" ::: "memory");
  49. #endif
  50. }
  51. }
  52. };
  53. typedef fence_arch_operations_gcc_ppc fence_arch_operations;
  54. } // namespace detail
  55. } // namespace atomics
  56. } // namespace boost
  57. #include <boost/atomic/detail/footer.hpp>
  58. #endif // BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_GCC_PPC_HPP_INCLUDED_